Modify the sleep state settings for BLSP1 UART3 pins to optimize power
when the usecase isn't in play.
Change-Id: I1405a8561b1ecb2e3da87ed8b26fb087433a1c11
Signed-off-by: Girish Mahadevan <girishm@codeaurora.org>
Add debug statistics for GSI commands in order to
improve debug capabilities
Change-Id: Iee80fd2bf4b549665a12791009f0cf5ecc7653b9
CRs-Fixed: 1079245
Acked-by: Ady Abraham <adya@qti.qualcomm.com>
Signed-off-by: Skylar Chang <chiaweic@codeaurora.org>
The hardware frequency that LMH DCVSh hardware has requested may not
match an actual frequency of CPU. The OSM hardware will aggregate and
match this request to a nearest frequency mentioned in the clock plan.
The current lmh dcvs driver exposes this request without matching to
a frequency value in the OPP table.
In order to reflect the final mitigated frequency, match the mitigation
frequency request from LMH DCVSh to a nearest CPU frequency floor
in OPP table.
Change-Id: Iffc380898eac33f6c30c3808eb38d7bb499f5769
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
The LMH DCVS hardware along with different monitoring algorithms, also
provides support for HLOS to vote for a CPU mitigation request. The
hardware will aggregate this request and will place the aggregated
mitigation request to OSM. The generic CPU cooling device doesn't take
advantage of this platform CPU mitigation feature.
Register the LMH DCVSh device as a platform cpu cooling device. When
registered, thermal CPU cooling device will place the mitigation request
with the LMH DCVSh hardware bypassing the cpufreq software. This will
allow faster mitigation action.
Also, thermal core framework exposes standard sysfs interfaces for
querying the cooling device state. Using this sysfs interface, users
can query the instantaneous CPU frequency mitigation request from
LMH DCVSh hardware.
Change-Id: I23762895d04dd6f1da8bb496f2a4cf22c1b34216
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
cpu device can be controlled by a hardware platform device and in those
cases the cpu cooling device interface should communicate with the
platform device instead of the cpufreq module.
Allow platform drivers to register with CPU cooling with their frequency
mitigation functions. This allows the cpu cooling interface to
communicate the frequency mitigations to the platform driver directly.
Change-Id: I47960b002bf1bce1cd588de2892de46793a95562
Signed-off-by: Ram Chandrasekar <rkumbako@codeaurora.org>
Reported by static analysis tools. generic_device_group() may return
NULL on an error case.
Change-Id: I33e8e859e99d4f7c4616aeee1da8214497e30625
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
The MDSS DP driver has compilation issues on msmfalcon 32-bit builds.
Remove config for the driver to skip compilation till the relevant
issues are resolved.
Change-Id: I8b4d464c793fd943abca2b9041f5751abc9ed22b
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
msmcobalt QVR has different hardware design with MTP.
Add sound card entry for msmcobalt QVR to enable wsa,
earpiece and microphones.
CRs-Fixed: 1078551
Change-Id: Ic55c44de74e537463a218619861f28c1e6eb66c1
Signed-off-by: Meng Wang <mwang@codeaurora.org>
If the bootloader uses the long descriptor format and jumps to
kernel decompressor code, TTBCR may not be in a right state.
Before enabling the MMU, it is required to clear the TTBCR.PD0
field to use TTBR0 for translation table walks.
The commit dbece45894 ("ARM: 7501/1: decompressor:
reset ttbcr for VMSA ARMv7 cores") does the reset of TTBCR.N, but
doesn't consider all the bits for the size of TTBCR.N.
Clear TTBCR.PD0 field and reset all the three bits of TTBCR.N to
indicate the use of TTBR0 and the correct base address width.
Change-Id: Ib497ef7ecdee6c517205ec76724283d4cbd89bdc
Fixes: dbece45894 ("ARM: 7501/1: decompressor: reset ttbcr for VMSA ARMv7 cores")
Acked-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Srinivas Ramana <sramana@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Git-commit: 117e5e9c4cfcb7628f08de074fbfefec1bb678b7
Git-repo: git://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
The GPU PLL initial configuration is modified to 800MHz and also update the
RCG to be able to support force enable/disable for gfx3d_clk_src.
Change-Id: I8e6d7dba762b678070d66e291347af2cdf804ae5
Signed-off-by: Taniya Das <tdas@codeaurora.org>
Add support for Venus PIL which facilitates the loading of venus
firmware, authentication and bringing it out of reset.
Change-Id: I3cdef3870dfd88562f3435d678698e3a906ae673
Signed-off-by: Gaurav Kohli <gkohli@codeaurora.org>
Whenever the battery profile is loaded, notify charger SW with
float voltage and FCC obtained from the battery profile.
Change-Id: I0419b34fde9d74460b849ee8a7ef7e2cdf5592d2
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Fast charge current (FCC) and float voltage are parameters that
are battery specific and needs to be set based on the profile
detected by Fuel Gauge driver. Expose the following properties
from battery power supply so that FG can set them.
- POWER_SUPPLY_PROP_VOLTAGE_MAX
- POWER_SUPPLY_PROP_CONSTANT_CHARGE_CURRENT_MAX
Change-Id: I72465484b154b1a758285d58906ce7661a246767
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Subbaraman Narayanamurthy <subbaram@codeaurora.org>
Try.SNK is not permitted in PD per spec. Disable it while
pd_active is true.
Change-Id: I90891232d37b95f011b3f2d5278f0fd0f4c9eb71
Signed-off-by: Harry Yang <harryy@codeaurora.org>
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
The policy engine needs to be informed that its time to start
its activities when APSD results are available and/or PD_ALLOWED
is decided. USB type property shouldn't change after that.
Since HVDCP_TIMEOUT_VOTER is the last one to cast its allow vote
in the sequence, use it to reflect the PE_START property.
While at it since PE_START property is returned assuming an atomic
context, the read of PD_ALLOWED could be moved to its sleepable
variants. This aids in keeping the policy engine code simple and also
assures race free code.
Change-Id: Ib98ac10d87200a2fd5492e27399f696f2468eba6
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Make sure to properly clear the PD_IN_HARD_RESET property upon
reaching the SNK_Transition_to_default state to ensure that the
charger driver is notified that hard reset has completed. Move
the clearing of pd->hard_reset flag here as well for clarity.
Also clear the pd->in_pr_swap flag when initiating or receiving
hard reset signal as that should promptly abort any PR swap
operation in progress.
Change-Id: I967e3841af614ecd2129bf60dc08a1b19731c4e3
Signed-off-by: Jack Pham <jackp@codeaurora.org>
Support the new POWER_SUPPLY_PROP_PE_START property which
indicates when the policy engine state machine can begin.
This helps to simplify the psy_changed() routine as we can
now rely on this property to indicate that PROP_TYPEC_MODE
and PROP_TYPE are already settled. The state machine work
can now simply begin when seeing a change in TYPEC_MODE.
This replaces the previous use of PROP_PD_ALLOWED which prior
to commit 18da08334e ("usb: pd: Handle PD_ALLOWED within
state machine") was intended to be a marker to start up
the policy engine but now simply indicates whether or not to
start PD comms. We can now move reading of this property to
usbpd_set_state() as it is now only needed locally in the
SNK_STARTUP handling.
Change-Id: Ia0b9e5b011ae72e1afcaf5109b8253d124afc021
Signed-off-by: Jack Pham <jackp@codeaurora.org>
This property will be used to indicate to the policy engine that it
should start its activities.
Change-Id: I9deb48f7bff71b022c5899e6eff7617526d02324
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
A merge conflict resolution caused a break statement to be dropped in
the case block for reporting input_current_limited property.
Fix this.
Change-Id: Ic5c9626628f05f3167f9f8d0b78b04b83446f413
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Correct the secure address threshold to 0x0A since Misc peripheral has
secure registers starting as early as 0x0A
CRs-Fixed: 1048242
Change-Id: Id7ec03919e2fd08540cd7e677bf5e4048d73c23d
Signed-off-by: Harry Yang <harryy@codeaurora.org>
