Efuse parameters are used to update qusb analog tuning values.
Change-Id: I4bc919ba7cf24d73cbc6cac392e00f81005bf64c
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
Tune1 HSTX_TRIM parameter varies from part to part and needs to
be programmed using fused values. Update the code to read
the efuse register and update tune1 parameter. On previous
platforms this used to be tune2.
Change-Id: I7a2efa3c2409ba5dbb1ae9581738518b9457a971
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
Update the sequence to include tune1 and tune2 parameters. While
at it update the comments to include register names.
Change-Id: Ib8ff42a6e05c0065b19e977eb56f6b96a78fcf39
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
Update the tcsr_clamp_dig_n signal and phy init sequence
to reduce the random leakage from qusb2 phy. Random leakage
can result from turning on/off analog power rails
before/after digital power rails.
Change-Id: Id51a2d34f61c0a41891551d15b706872abf13809
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
Analog and digital power rails connected to the phy can be turned
on/off in any order. This may result in random leakage in the phy
as it expects certain power rails to be on/off in certain order.
Avoid random leakage on qusb2 phy by
1. Disable pll when phy is suspended/disconnected.
2. Reset and assert clamp dig_n signal to put dp/dm lines in high
impedance state.
Change-Id: I1bafa7f824af8bbb3f67a71b81bf23b0a9c7164e
Signed-off-by: Vamsi Krishna Samavedam <vskrishn@codeaurora.org>
Add support to enable WDI 2.0 interface on IPA version 2.6.1
which is used in falcon.
Change-Id: Id6460f21245808b739ad215fe8073ae7cae8422c
Acked-by: Mohammed Javid <mjavid@qti.qualcomm.com>
Signed-off-by: Utkarsh Saxena <usaxena@codeaurora.org>
fd(s) cannot uniquely identify buffers queued by cross-process
clients. Use ion handles to compare and match already-mapped-
buffers irrespective of data or extradata planes.
CRs-Fixed: 1060416
Change-Id: I591f18aa225cc6690bf423f2ae5bc7dafd4dad78
Signed-off-by: Praveen Chavan <pchavan@codeaurora.org>
Newer QCOM UFS host controller doesn't need to execute
the special LPM mode configuration when switching to SVS2
mode. This change looks at the host controller version
to bypass this special configuration for newer controller
version.
Change-Id: Ib84663955c0c0db6124819c4c4749e5c347a3495
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
New version of phy-qcom-ufs-qmp-v3 supports 2 lanes,
this change adds the config table to enable 2 lanes.
Change-Id: Ie916e7090d3660711159b886c27ee3709891ef2b
Signed-off-by: Venkat Gopalakrishnan <venkatg@codeaurora.org>
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
Enable CoreSight abort for msmcobalt. CoreSight driver will
dump any trace present in the current sink in case we hit a
kernel panic, user fault or an undefined instruction.
Change-Id: Iff2fdfb547617425182429d95fb1d3b9a2e4321f
Signed-off-by: Satyajit Desai <sadesai@codeaurora.org>
