The Tear check sync cfg height, in case of SW TE is calculated based
on panel's height and vertical porch values. Simulator panels has the
capability to change the panel resolution after bootup, which would
require recalculation of tear check height. Fix the sync cfg height to
be set right for all cases.
Change-Id: I5d27388a20d543b5655aa07ff6681001656a61c8
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
The DSI PHY regulator for both DSI0 and DSI1 is shared. So,
the regulator can be disabled during suspend only if both DSI0
and DSI1 are turned off, but both the DSI devices can be turned
on/off independently in case of dual DSI cases. Add change for
proper synchronization of DSI PHY regulator enable/disable.
Change-Id: I39b277d43e8b3bd1e7c475584da506566092c869
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Add required register programming in the DSI host driver to support
command mode panels that use Display Stream Compression (DSC) modes.
Change-Id: I316086e929f2424d56097e2f9d63a01de2d3fe8d
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
DSIPHY_GLBL_TEST_CTRL register needs to be programmed based on the PLL
that will be driving the respective PHY which in turn depends on the
configuration of the two DSI devices. Add validity checks to program the
appropriate value to the register.
Change-Id: I294b2d0e95157b32e52e7fa9e1f3de77d9739e1c
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
The PLL source for the DSI clocks can be specified using the
pll_src_config DTSI binding. However, this binding is optional and
whenever it is not specified, the default configuration should be
programmed based on the underlying hardware configuration. If the
hardware configuration is split-dsi, then both branches should source
from the same PLL, otherwise they should source from their corresponding
PLLs.
Change-Id: Idc1c003fede7440bad10311fe1f3bc44cc627053
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
Based on the board configuration, the two DSI controllers can either
drive two independent panels or drive a single panel in split display
mode. DSI0 PLL can drive split display configuration ands it is not
supported by DSI1 PLL. DSI0 PLL can drive a single DSI panel on either
DSI0 or DSI1 controller whereas DSI1 PLL can drive a DSI panel only on
DSI1 controller. Based on this, it is necessary to configure the
source for the DSI link clocks dynamically. Implement this by adding
support for a new pll source configuration entry.
Change-Id: Ie57afbfe8cb14b80d0b52ed3825972ae34af27e2
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi file updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Add support for all the clocks provided by the DSI1 PLL in preparation
for supporting two independent displays using the two DSI controllers.
Change-Id: I9c9e4cddd23be869d9f16a5c3e1351a88f88699f
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi file updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
In the current implementation, DSI0 PLL driver explicitly disables DSI1
PLL at numerous instances to work around a hardware issue that requires
explicitly powering down any unused PLLs whenever MDSS GDSC is toggled.
However, this is not needed anymore since each PLL can independently
power itself down as part of the GDSC notifier worker thread.
Change-Id: Ic56f0ce350dd9ad648f3b96baa753345a74897b0
Signed-off-by: Aravind Venkateswaran <aravindh@codeaurora.org>
MSM8996v2 does not share the same HDMI PLL sequence
as MSM8996v1. Update the HDMI PLL driver for MSM8996
to support the differing sequences.
Change-Id: Ibfdac25383e6504c707f2abe95b9fa2732283acf
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
Add a comment specifying guidelines for user on how to fill roi
information when calling commit IOCTL.
Change-Id: Iaab026131baccace1d4236777ff68d5953b5342b
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Incorrect get rate for n1 divider and vco rate
leads to wrong calculation of byte clock and pixel clock
during handoff for continuous splash screen. Correct
n1 divider should be read from register instead of
software because software structures are not set during
handoff. Incorrect vco calculation also provides
invalid vco rate. This change fixes both APIs to provide
correct rate for byte and pixel clock rate calculation.
Change-Id: I2b42490a58061cee429aaa777a43eaf7c384b6d9
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Rotator driver maps the same buffer twice. First time in caller
context while second time in worker queue. Ideally, it should
map buffer single time in worker queue. Mapping it in caller
context during validation will block the client call and can
cause the delay. Moving it to worker thread fixes double
mapping issue for same buffer.
Change-Id: I17ebe188ace2e54714247fc87277f3da51a64d73
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Some of the properties of the individual DSI controller nodes are
common between them. Instead of having duplicate entries, they can
actually be shared via. a common data structure which can be part
of the root DSI node. Add changes in the MDSS dtsi file and the DSI
drivers to support this.
Change-Id: I22dbc1d81678fea191b3f58bd8dcc667fafdfe6a
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi file updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Current DSI driver implementation treats the two DSI controllers
as separate devices. However, some use cases might require the
two DSI devices to be aware of the global configuration of the
display interfaces. For instance, the panel/board configuration
might require both the DSI controllers to work in tandem and
drive a split DSI panel or else drive two different panels
independently. Add a root DSI node in MDSS dtsi and the two
DSI controller nodes as the child nodes. Refactor the DSI
panel related dtsi files and DSI drivers to support this new
design. The DSI root node contains the global information needed
for the DSI controllers like the DSI h/w configuration needed to
drive the panel(s), the DSI register space ranges etc.
Change-Id: I3661adf9ce2ecbef83ae3267e4aae18e0f0c8d04
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi file updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
The DSI lane settings are dependent on the board h/w settings
and not dependent on the panel. Currently this setting is part of
the panel dtsi. Add change to move this from the panel dtsi to
the board specific dtsi files. Add corresponding driver changes
to parse the DT property correctly.
Change-Id: Ic2008eb7b0668945b0ed938dba87f94b203733eb
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi file updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Currently, the LAB/IBB regulators to supply power to the panel are
controlled in MDSS DSI drivers and the property to enable it is part
of MDSS DSI node. This needs to be ideally enabled/controlled through
the panel dtsi. Add support to control these regulators similar to
the other PMIC LDO regulators via the panel dtsi node for 8994, 8992,
8996 and 8952. Cleanup the existing code in DSI drivers related to
LAB/IBB control.
Change-Id: Ie504da64f7752625060717dbeb08f8da1c87c98e
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
Signed-off-by: Siddhartha Agrawal <agrawals@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi files, replace
regulator_set_optimum_mode with regulator_set_load]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Currently, we turn off the DSI ctrl/PHY regulators during suspend as
part of panel power control API which might cause the regulators to be
turned off before the DSI controller and PHY is disabled. Hence, add the
DSI PHY regulators to the MDSS DSI node for multiple chipsets and control
these regulators as part of DSI clock control API.
Change-Id: I134ad45155605db049088efb5d819e142bafdc12
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[cip@codeaurora.org: Removed msm8996-mdss.dtsi from commit]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Regulators that are needed to supply power to the panel are currently
specified in the DSI controller dtsi node. This limits the support of
multiple panels on a single software build, since every panel may have
a different set of regulator supply configurations. Hence, add the driver
support to specify the panel regulators in panel dtsi file instead
of mdss dtsi file and update the panel dtsi files accordingly.
Change-Id: Icd512f0bcc353d4e856b9dbe5dead5a108f1318b
Signed-off-by: Padmanabhan Komanduru <pkomandu@codeaurora.org>
[cip@codeaurora.org: Removed .dtsi file updates]
Signed-off-by: Clarence Ip <cip@codeaurora.org>
Current driver votes for bandwidth on two different kinds of buses,
data (AXI) and register (AHB). However terminology used to track these
voting is not consistent and easily lead to misunderstanding. Clean-up
some of these terminology to make driver code more readable.
Change-Id: I54d636125786876e8326d6c0279b5a76a1591ae9
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
Currently bus bandwidth can happen from 2 separate contexts where commit
context does not hold lock and blindly votes bandwidth. Rather use a
single bandwidth lock and count for all contexts. This also requires
fixing a bug during ctl stop where ctl power status needs to be changed
only after bus vote has finished.
Conflicts:
drivers/video/msm/mdss/mdss_mdp.c
drivers/video/msm/mdss/mdss_mdp_ctl.c
Change-Id: I4131b05195298d15a46101aa4ebb88ea2e80b3dc
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
This change adds a sysfs node for assertive display attenuation
backlight change notification. Any AD related backlight notification
will be posted to the ad_bl_event sysfs node, so userspace clients
can be notified if they poll on the same sysfs node.
It will simplify and optimize the previous notification ioctl
implementation.
Change-Id: I7a8f86563d5802a41dc200f5901a8d0bed1cf765
Signed-off-by: Ping Li <pingli@codeaurora.org>
The upscale and unity scale parameter for X direction pixel extension
is calculated and applied correctly only for plane 0. For other planes,
these parameters are taken from previous plane's Y direction
calculation, leading to corruption of images. Fix the calculation for
these parameters by separating the variables used for X and Y direction.
Change-Id: I066b014f2b55fc96afbf9424ebc679b409adb4c1
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Assertive display(ad) feature needs to issue screen refresh when ambient
light or backlight changes. It needs multiple screen refreshes to ensure
that AD block strength is reached. Duration between each refresh should
be vsync interval. AD calc worker is scheduled from vsync handler which
can notify the AD userspace module via sysfs node
Change-Id: If9d688de0b5befec9adab262a6ec1182b2bd5a19
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
In case of rotator buf sync ioctl, the ioctl could be called on
frame buffer device for which panel is off. However rotator sessions
may still be active. In such cases the call shouldn't fail, thus move
check for panel off only when the target sync fence timeline is for
the panel.
Change-Id: Ice4557fcbe82df2761c65f67a0bf81a2d72fde75
CRs-Fixed: 837945
Signed-off-by: Adrian Salido-Moreno <adrianm@codeaurora.org>
After the commit cdc666d763b835dced549f2811561fdc86338bd4, titled
"msm: mdss: enable tearcheck after panel on for synchronization",
second control's tearcheck is never enabled due to wrong offset.
This change corrects the offset for enabling second control's tear
check block. Driver is also not disabling TE in the shutdown path,
handle the same in this change.
Change-Id: Id187705ddf49578fd2c41dba0fe9071656b17139
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Add trace points for buffer map/unamp and
msm bus scale request API calls to find
the actual latency.
Change-Id: Ic141af071f7edaa9814b4c341d7468e1d76e573b
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Based on various use-cases such as camera and flip, MDP bandwidth
limit can be changed. For debug purpose add support to change
these paramaters via debugfs. First parameter takes mode and
second paramter takes bandwidth limit for that particular mode.
E.g. echo 2 1700000 > <debugfs>/mdp/perf/threshold_bw_limit
Change-Id: I98456f4f00223136628b2d2300b5785af386b134
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
MDSS currently has fixed maximum bandwidth enabled in DT file.
But there are scenarios where this maximum bandwidth support
can change to enhance performance. Based on scenarios such as
camera use, or flip involved declare the max bandwidth for
usecase in DT and change accordingly based on usecase.
Change-Id: Icc85d75d7a60fe6f934a1fbd9d5077b620b2993d
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
When histogram is started for a logical display we store the display
number as part of histogram info structure. When histogram stop is
called on a logical display control mixers might be turned off in case
of suspend usecase which will fail histogram stop ioctl. Since driver is
caching the display number, histogram for the dspp's which are attached
to logical display can be turned off without need for checking control
mixers.
Change-Id: I4f06f5aad562ff3a3df5449166b7d174d3e800eb
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Histogram interrupts are generated when data flows through the dspp
pipes. For video mode panels if there is no commits from userspace
MDP pulls the data through the dspp pipes which will generate interrupts
at panel refresh rate. Post processing algorithms needs to be
interrupted only when there is a commit and histogram interrupt is
generated. Change clubs the histogram enable bit mask with commit to
reduce reduntant interrupts
Change-Id: I545fc26cbf9e95ad71ae2a837edc93fd3de04c68
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Adding sysfs node for backlight notification will remove the need for
userspace clients to block on a ioctl. Exposing as a sysfs node will
allow the userspace thread architecture to be optimized.
Change updates the driver to signal via sysfs node for backlight
notification
Change-Id: I00752799ac81580f7ff7ee380b39d5bf43c3f8d3
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
Histogram is used by algorithms in userspace, current driver interface
is blocking ioctl call to read histogram. Moving away from blocking
ioctls in driver will reduce the userspace thread requirements.
Change adds a histogram sysfs node for each framebuffer which will be
utilized to notify the clients
Change-Id: Ia88c4d2ba3de8f96ebb5fb915be9b4cefc9471a3
Signed-off-by: Gopikrishnaiah Anandan <agopik@codeaurora.org>
cmd mode simulator panels depended on terminator card for HW TE
generation. This change adds the capability of SW TE, that eliminates
the requirement of terminator card. The SW/HW TE modes can be selected
by passing the override string along with the override parameters in
the panel string passed by bootloader. With this change, any panel
which has a valid device tree file file can be booted up in simulation
mode with either HW/SW TE for command mode and no TE for video mode
panels.
eg:
- simulator single DSI cmd mode with SW TE
1:dsi:0:qcom,mdss_dsi_sim_cmd:1:none#override:sim-swte
- simulator single DSI cmd mode with HW TE
1:dsi:0:qcom,mdss_dsi_sim_cmd:1:none#override:sim-hwte
- Simulator dual DSI cmd mode with SW TE
1:dsi:0:qcom,mdss_dsi_sim_cmd_0:1:qcom,mdss_dsi_sim_cmd_1
#override:sim-swte
- JDI 1080p video mode panel in simulator mode
1:dsi:0:qcom,mdss_dsi_jdi_1080p_video:1:none#override:sim
Change-Id: I4a0fdca9e22e72fe2cc2d7ad3a15e0a41a851266
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Determine if the HDCP keys are stored in software
registers or hardware fuses on supported hardware.
Change-Id: I9492a458c38aaea4303d3387d79c01bb9beb3219
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
For bandwidth calculations, driver needs to know
compression ratio factors which depends on the pixel
format. This change adds support to share this
information with user-space.
Change-Id: I08aa8792c38bb85a8114a21cbaabe905bbfee289
Signed-off-by: Ingrid Gallardo <ingridg@codeaurora.org>
When user passed in roi is zero, skip roi validation, and make the final
roi as full screen.
Change-Id: I4062afba3f85d41cec28e1bc47ea6c0f8f61336f
Signed-off-by: Ujwal Patel <ujwalp@codeaurora.org>
For DSI on/off commands with command length exceeds PAGE_SIZE,
need to support multiple readings to get the complete results.
Change-Id: I372be86b8a40880a36b3dd0be5f761b2f9efb605
Signed-off-by: Yang <yangxu@codeaurora.org>
When the phone is in suspend mode, the panel turns ON and OFF
whenever it receives the message for ambient display. There
are cases whenever the Power Key is pressed, it skips the
Panel ON because already the state of the Panel is ON and the
esd_rdy didn't turn to true, which was set to false during
Panel OFF event. This result in ESD being disabled sometimes
when we coming out of ambient mode. Hence set esd_rdy to false
when panel power state state is not interactive.
Change-Id: Id8cff84dcc9b7f679221c24e25c086c3c65ebd7c
Signed-off-by: Jayant Shekhar <jshekhar@codeaurora.org>
PWM drivers goes to bad state and cleans up the
backlight configuration on PMIC if config is called
without enable. DSI driver should enable the PWM
during continuous splash to add a refcount like
clock and regulator enable. This avoids calling
PWM APIs with invalid structures.
Change-Id: Ida72583b3e74159aaed3170e3456d21e17ea58ff
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Handoff APIs tries to do clamp configuration during
continuous splash screen. This configuration is not
working for msm8996 which put PHY in bad state for
this target. It is fixed by adding the DSI revision
check in handoff API to avoid clamp configuration.
Change-Id: I9f35d50a78f064757373711968fba05c120f3694
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
In the current implementation, too few lines while changeing frame rate
is considered as fatal and this is not true. Reduce the log level for
the same as it is a safety check before updating the dynamic refresh.
Change-Id: I0aac9d3703bdbc49536f32fa49c4307aa7231318
Signed-off-by: Jeevan Shriram <jshriram@codeaurora.org>
Turning off pll digital block before link clocks leads
to clock status stuck ON. Ideally, DSI driver should
first stop the lanes, followed by link clock stop
and pll disable. This change implements these
recommended sequence for both DSI controllers.
Change-Id: Ibe3061a65bad2dbfdffd9505d469f10f62a6e39d
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
msm8996 v2 pll needs different ldo configuration in DSI
pll compared to v1 target. This changes updates the DSI
pll driver to support this new configuration.
Change-Id: Idccfad2e388273a15b45a0e8bb822513fcbbe70e
Signed-off-by: Dhaval Patel <pdhaval@codeaurora.org>
Pll unlocked due to wrong pll fractional divider calculated.
Pll fraction divider should be reminder of 2^20 after vco
rate divided by reference clock rate.
Change-Id: I9e4c2e3c0631e533d114c3e6acf65b71b9bf00d2
Signed-off-by: Kuogee Hsieh <khsieh@codeaurora.org>
As part of 3.18 upgrade, remove support pll support for all
other targets except msm8996.
Change-Id: Idc778ccba25ce22ad7e418c45f2bd8d21ccb95e8
Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
Export stereoscopic 3D modes supported by the driver to the
userspace.
Change-Id: I9992fc10abeca9cf48a9cca5efd404ec0693bb72
Signed-off-by: Naseer Ahmed <naseer@codeaurora.org>
To improve the timing margin, lane mode selection
needs to be written during the HDMI PHY startup
sequence. This prevents a timing failure when
VDDCX or VCCA_CORE are applied rather than the
nominal value.
Change-Id: I2ed54f63903a473eca12fb4d8f3b542585397dae
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
Update HDMI PLL calculation for thulium. These changes are based on
latest settings from PHY team.
Change-Id: I9ab20c4101ff7cbebab61c35553b3e9d4799019f
Signed-off-by: Vinu Deokaran <vinud@codeaurora.org>
Signed-off-by: Casey Piper <cpiper@codeaurora.org>
